The present invention relates to memory elements in Josephson technology, and more particularly to a memory element with multibit storage capability using Josephson junction devices.
Memory devices for superconductive circuits traditionally have large storage elements for non-destructive readout (NDRO) capabilities, even larger than comparable semiconductor memory elements. These superconductive memory devices use flux storage in loops, which is not fast relatively speaking, the access time being on the order of hundreds of picoseconds. For economical production large scale integration is required, but the yield for superconductive memory elements is not sufficient to produce memories above 4 kilobits. Finally superconductive memory elements are susceptible to flux trapping, i.e., they are sensitive to magnetic fields that are either ambient or self-induced. Shielding of the elements is very difficult, and to detrap the flux the surface needs to be warmed up, which is destructive to the memory contents.
What is desired is a high speed, low area memory element with multiple bit storage.